1. Field of the Invention
This invention pertains to a box for the transportation of semiconductor wafers. In particular, this invention pertains to such a box with walls that are adjustable in height so as to accommodate the number of coin-stacked wafers to be transported.
2. Description of the Prior Art
In the prior art, there are many boxes for the transportation of coin-stacked semiconductor wafers. However, typical prior art wafer boxes have a fixed size for a fixed number of semiconductor wafers. As a result, the volume of shipping containers and dunnage material is the same regardless of the number of wafers enclosed within the wafer box. This can increase the shipping costs associated with a “partial run” which is typically defined as less than twenty-four wafers.
Examples of some prior art are U.S. Pat. No. 6,193,068 entitled “Containment Device for Retaining Semiconductor Wafers” issued on Feb. 27, 2001 to Lewis et al.; U.S. Pat. No. 6,286,684 entitled “Protective System for Integrated Circuit (IC) Wafers Retained Within Containers Designed for Storage and Shipment” issued on Sep. 11, 2001 to Brooks et al.; U.S. Pat. No. 6,003,674 entitled “Method and Apparatus for Packing Contaminant-Sensitive Articles and Resulting Package” issued on Dec. 21, 1999 to Brooks; and U.S. Pat. No. 5,724,748 entitled “Apparatus for Packaging Contaminant-Sensitive Articles and Resulting Package” issued on Mar. 10, 1998 to Brooks et al. Also of interest is U.S. patent application Ser. No. 10/507,471 entitled “Wafer Box with Radially Pivoting Latch Elements” filed on Sep. 10, 2004 by Forsyth.